1. Field of the Invention
The present invention relates to an alignment method and an alignment apparatus used in an apparatus which requires a precision alignment unit, for example, an exposure apparatus in which an electronic circuit pattern on an original plate such as a mask is exposed onto a substrate such as a semiconductor wafer. The alignment method and the alignment apparatus are used for accurately aligning a plurality of alignment targets formed on the substrate in a predetermined configuration with high accuracy. In addition, the present invention also relates to an exposure apparatus using the alignment method and the alignment apparatus.
2. Description of the Related Art
In semiconductor exposure apparatuses, so-called steppers are commonly used for aligning a mask and a wafer with high accuracy.
FIG. 4 is a schematic diagram showing a known semiconductor exposure apparatus. As shown in FIG. 4, exposure light 9 is irradiated onto a wafer 7 placed on an XY stage 8, which moves along a two-dimensional plane, and an electronic circuit pattern formed on a mask 6 is thereby transferred onto the wafer 7.
With reference to FIG. 4, reference numeral 1 denotes an illumination device used for alignment, reference numeral 2 denotes an imaging device, and reference numeral 3 denotes a position detector. An alignment optical system is constructed of these components, and serves to detect a relative displacement between the mask 6 and the wafer 7. Reference numeral 4 denotes a central processing unit (CPU), and reference numeral 5 denotes a stage driver for driving the XY stage 8.
As shown in FIG. 5, alignment marks (M1x, M1y, M2x, M2y, . . . ), each of which is detectable in the X or Y direction, are formed on the wafer 7 at shot areas where exposure is to be performed. In addition, the mask 6 has marks corresponding to the alignment marks formed on the wafer 7, and the relative displacement between the mask 6 and the wafer 7 is detected by the above-described alignment optical system.
FIG. 6 is a flowchart showing an exposure process performed by the semiconductor exposure apparatus shown in FIG. 4.
As shown in FIG. 6, first, the wafer 7 is placed on the XY stage 8 by a wafer-conveying device (not shown) (Step 601). Then, the CPU 4 shown in FIG. 4 sequentially selects the alignment marks formed at each of the shot areas on the wafer 7 (Step 602), moves the XY stage 8 such that the selected alignment marks are moved to be below the marks formed on the mask 6 (Step 603), and measures the amount of displacement at each of the shot areas (Step 604). Steps 602 to 604 are repeated until the number of shots reaches a predetermined number (Step 605). In FIG. 6, the number of sample shots is set to eight.
FIG. 7 is a diagram showing a designed mark position di, an actual mark position ai, a corrected mark position gi obtained by using conversion parameters, and the residual error ei between the corrected mark position gi and the actual mark position ai, in a shot area of the wafer 7 used in the semiconductor exposure apparatus shown in FIG. 4 and in an exposure apparatus according to an embodiment of the present invention, which will be described below. With reference to FIG. 7, when the actual mark position ai=[axi, ayi] at each of the shot areas, which is obtained by measurement, is derived from the designed mark position di=[dxi, dyi] by correction conversion, the corrected mark position gi=[gxi, gyi] including the residual error ei=[exi, eyi] is expressed as follows:gi=Adi+S  (1),wherein A and S are conversion parameters, which will be discussed in more detail below.
In addition, the residual error is expressed as follows:ei=ai−gi  (2)
At Step 606 in FIG. 6, the CPU 4 shown in FIG. 4 determines the conversion parameters A and S so as to minimize the sum of squares of the residual error (Σ|ei|2) determined by equation (2).
Then, the CPU 4 shown in FIG. 4 drives the XY stage 8 on the basis of the determined conversion parameters A and S, and exposure is performed for all of the shot areas on the wafer 7 (Step 607 ). Lastly, the wafer 7 is unloaded (Step 608).
The conversion parameters A and S in equation (1) can be expressed as follows:                               A          =                                    (                                                                                          1                      +                                              α                        ⁢                                                                                                  ⁢                        x                                                                                                  0                                                                                        0                                                                              1                      +                                              α                        ⁢                                                                                                  ⁢                        y                                                                                                        )                        ⁢                          (                                                                                          cos                      ⁢                                                                                          ⁢                      θ                      ⁢                                                                                          ⁢                      y                                                                                                  sin                      ⁢                                                                                          ⁢                      θ                      ⁢                                                                                          ⁢                      y                                                                                                                                                          -                        sin                                            ⁢                                                                                          ⁢                      θ                      ⁢                                                                                          ⁢                      x                                                                                                  cos                      ⁢                                                                                          ⁢                      θ                      ⁢                                                                                          ⁢                      x                                                                                  )                                      ,                  S          =                      (                                                                                S                    ⁢                                                                                  ⁢                    x                                                                                                                    S                    ⁢                                                                                  ⁢                    y                                                                        )                                              (        3        )            
In equations (3), αx and αy show expansions of the wafer in the X and Y directions, respectively, and θx and θy show rotations around the X and Y axes, respectively, of the shot-area configuration. In addition, S shows parallel displacements of the wafer in the X and Y directions.
In this method, the displacement measurement need not be performed at all of the shot areas, but rather, it is only performed at a limited number of shots areas (sample shots). Accordingly, there is an advantage in that the throughput increases.
However, since the number of sample shots is set in advance in the above-described known technique, when a wafer having a large configuration error is used, correction error increases due to an insufficient number of the sample shots. In addition, when a wafer having a small configuration error is used, the number of sample shots is larger than that necessary for obtaining the required accuracy. In such a case, there is a disadvantage in that the throughput decreases.
FIGS. 8 and 9 show the relationship between the number of shots and the conversion parameter according to the known art. The vertical axis shows the conversion parameter and the horizontal axis shows the number of shots. In both of the examples shown in FIGS. 8 and 9, the number of sample shots is set to eight. In FIG. 8, the measurement is finished even though the conversion parameter has not yet converged sufficiently. In such a case, the alignment accuracy decreases. On the other hand, in FIG. 9, the measurement is unnecessarily continued even after the conversion parameter has converged and a sufficiently accurate conversion parameter is obtained.